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FuriosaAI
Signal/Power Integrity Engineer (On-/Off-Chip)
Seoul, Seoul, South Korea Posted todayfulltime
Apply on FuriosaAI's career page
What you'd do
- Define SI/PI requirements from IP and system specifications for AI chip and advanced packaging designs
- Perform EM,circuit,and system-level SI/PI simulations for chiplet,3D-IC,and D2D interfaces
- Provide design guidance on stack-up,interconnect routing,PDN architecture,and decoupling strategy
What they want
- Bring 8 or more years of component and system-level SI/PI analysis experience in practice
- Apply EDA tools including SIwave,HFSS,ADS,HSPICE,or RedHawk proficiently in real projects
- Use VNA,TDR,and real-time oscilloscopes for hands-on lab measurement and debug work
Nice to have
- Analyze and optimize SI/PI for high-speed digital interfaces including PCIe,DDR,and Ethernet
- Perform on-chip clock sign-off with 3DIC jitter derating and multi-corner variation analysis
Seoulstart's read
Visa tier (likely) E-7 specialty / professional (likely)
Korean language Korean requirement not stated
English friendliness High: JD in English, foreign-friendly signals
Context FuriosaAI designs custom AI NPU chips; English-language JD signals international team; 8-plus year senior role with advanced packaging focus.
This is Seoulstart's analysis of the public job description, not the employer's stated policy. Verify visa sponsorship, language requirements, and remote allowances directly with the recruiter.
View the full posting and apply on FuriosaAI's career page
Related Seoulstart guides
- E-7 visa: full guide
- E-7 occupation codes
- D-2 to E-7 conversion
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