SerDes Architecture and Modelling Engineer
- Moves you to
- United Kingdom
- Support
- Visa sponsorshipRelocation support
- Posted
- Sep 24, 2026
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This is a new opportunity for a SerDes Architecture and Modelling Engineer with our UK-based Semiconductor client. This role can be based in Cambridge or the Thames Valley.
With significant investment behind them and major growth plans, our client is recruiting into their Advanced R&D team, seeking a SerDes Architecture and Modelling Engineer. This is a research and architecture-focused position for an engineer who enjoys investigating new ideas, developing algorithms and creating models to explore the performance of next-generation high-speed communication systems.
The role has a strong emphasis on research, innovation and developing new architectural concepts rather than simply implementing established designs.
As a SerDes Architecture And Modelling Engineer, You Will
The Ideal Candidate Has
With significant investment behind them and major growth plans, our client is recruiting into their Advanced R&D team, seeking a SerDes Architecture and Modelling Engineer. This is a research and architecture-focused position for an engineer who enjoys investigating new ideas, developing algorithms and creating models to explore the performance of next-generation high-speed communication systems.
The role has a strong emphasis on research, innovation and developing new architectural concepts rather than simply implementing established designs.
As a SerDes Architecture And Modelling Engineer, You Will
- Research and develop new concepts for high-speed serial communication systems
- Build system level models to investigate, compare and optimise new architectures
- Develop signal processing algorithms and evaluate their impact on link performance
- Use MATLAB, Python or C++ to model communication systems and test new ideas
- Work with architects and IC designers to translate research concepts into practical transceiver architectures
- Analyse system limitations including signal integrity, noise, power and clock recovery
- Define link budgets and block-level specifications based on system requirements
- Support analog, digital and verification teams throughout the development process
The Ideal Candidate Has
- Experience working on system-level modelling of communication systems, high-speed interfaces, SerDes, or related technologies
- An understanding of signal integrity, channel behaviour, noise, jitter, equalisation, and link-performance analysis
- An ability to translate system requirements into block-level specifications
- An ability to collaborate with analog, digital, verification, and architecture teams, to validate models against circuit simulations or measurements, and develop maintainable, tested modelling software.