FPGA DSP Design Engineer - Deep Tech Industry

FPGA DSP Design Engineer - Deep Tech Industry

Incredible opportunity to join a deep tech pioneer in the creation of their new generation of FPGA on a completely greenfield program. It's a unique role allowing you to join a team of expert FPGA designers and verification engineers but taking ownership over the entire DSP process.

Start Date: January 2027

Location: South Holland (2-3 days onsite per week)

Languages: English

To be successful in this role you must have proven expertise as a Senior FPGA/RTL Designer with experience Digital Signal Processing Projects.

Key Skills / Responsibilities:

• Extensive hands-on experience in FPGA RTL design, development and implementation, with a strong understanding of digital design principles.
• Proven experience designing and implementing complex DSP (Digital Signal Processing) architectures within FPGA environments.
• Strong RTL coding skills using VHDL and/or Verilog/SystemVerilog.
• Experience developing and implementing distributed architectures and distributed processing designs across FPGA platforms.
• Ability to translate complex system-level and DSP requirements into efficient, synthesizable RTL designs.
• Strong understanding of FPGA architecture, microarchitecture, resource utilisation, timing constraints and performance optimisation.
• Experience with RTL integration, design partitioning, clock domain crossing (CDC) and reset domain management.
• Hands-on experience with FPGA synthesis, place and route, timing closure and implementation workflows.
• Experience debugging complex RTL designs and resolving design, timing and integration issues.
• Strong understanding of digital signal processing concepts, including filtering, signal conditioning, data paths and high-speed data processing.
• Experience working across the full FPGA development lifecycle, from architecture and RTL development through to implementation and hardware validation.

Desirable:

• Experience using the RDL (Register Description Language) tool for register map development and hardware/software register interface generation.
• Familiarity with automated register generation, register modelling and integration into FPGA/SoC designs.
• Experience working on high-performance, distributed FPGA systems.

This is a business critical project with interviews available immediately so if interested please apply immediately!