Senior Hardware Engineer - FPGA & Platform Security

Do you want to be at the forefront of innovating the latest hardware designs to propel Microsoft’s cloud growth? Are you seeking a unique career opportunity that combines technical capabilities, cross-team collaboration, with business insight and strategy?

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees, we come together with a growth mindset, innovate to empower others, and collaborate to achieve our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.

Join the Systems Planning and Architecture (SPARC) team within Microsoft’s Azure Hardware Systems and Infrastructure (AHSI) organization, the team behind Microsoft’s expanding Cloud Infrastructure and for powering Microsoft’s “Intelligent Cloud” mission. Microsoft delivers more than 200 online services to more than one billion individuals worldwide, and AHSI is the team behind our expanding cloud infrastructure. We deliver the core infrastructure and foundational technologies for Microsoft's cloud businesses including Microsoft Azure, Bing, MSN, Office 365, OneDrive, Skype, Teams and Xbox Live. 

As a Senior Hardware Engineer – FPGA & Platform Security on SPARC, you will help define and build the hardware root of trust that protects Azure’s fleet, from silicon and FPGA prototypes through firmware, BMC, and datacenter deployment. You will translate security architecture into clear requirements, prototype and validate features such as secure boot, attestation, and secure recovery, and partner with silicon, firmware, and industry teams, including open efforts such as Caliptra and OCP S.A.F.E. This opportunity will allow you to deepen your expertise in hardware-rooted security, influence open industry standards, and see your work ship at hyperscale. This role is based in Redmond, WA or Mountain View, CA and requires three days per week in the office.

• Define requirements, specifications, and interface definitions for server platform features, including trust and integrity capabilities such as secure boot, attestation, and firmware recovery.

• Lead bring-up of new server, SoC, and FPGA-based platforms, from first power-on through firmware, BMC, and OS boot, and work with hardware and firmware partners to resolve issues quickly.

• Set up, maintain, and evolve lab infrastructure, including racks, networking, power, debug tooling, and remote management access, so engineers can validate new platforms efficiently.

• Prototype and integrate root-of-trust and HSM capabilities (for example, Caliptra) on FPGA and emulation platforms, and develop validation plans that cover normal, fault, and recovery scenarios.

• Build diagnostics, telemetry, and automated recovery tools that help fleet hardware detect problems, report its health, and return to a known-good state with minimal manual intervention.

• Debug complex system-level issues across silicon, FPGA, firmware, BMC, and software boundaries, and turn findings into improvements in design, tooling, and process.

• Partner with silicon vendors, ODMs, and industry groups such as OCP to drive adoption of platform requirements, mentor other engineers, and create reusable procedures and documentation.

Required Qualifications:

• Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 3+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 5+ years technical engineering experience OR equivalent experience

Preferred qualifications:

• Bachelor’s Degree in Electrical Engineering, Computer Engineering, or related field AND 8+ years technical engineering experience OR Master’s Degree in Electrical Engineering, Computer Engineering, or related field AND 6+ years technical engineering experience OR Doctorate Degree in Electrical Engineering, Computer Engineering, or related field AND 3+ years technical engineering experience OR equivalent experience.

• Experience with hardware or platform security technologies such as secure boot, attestation, hardware root of trust, or cryptographic hardware.

• Hands-on experience with FPGA design, prototyping, or emulation (Verilog/SystemVerilog and vendor toolchains) and lab bring-up of server or SoC platforms.

• Experience with root-of-trust or HSM architectures (for example, Caliptra, TPM, DICE, SPDM) and platform firmware resiliency standards such as NIST SP 800-193.

• Experience with server management and platform firmware (BMC, UEFI, PCIe/CXL), scripting in Python or C for automation, and cross-company collaboration through bodies such as OCP, TCG, or DMTF.