Senior Principal Engineer, RFIC Design
- Salary
- $155K–$348KUSD per year
- Hiring from
- United States
- Work type
- Hybrid
- Posted
- Sep 29, 2026
Join Kyocera International, Inc.
We’re hiring a Senior Principal Engineer, RFIC Design at our San Diego, CA location!
Join a stable, long-term opportunity where your work matters. We’re hiring a Senior Principal Engineer, RFIC Design to support production and ensure high-quality output in a fast-paced manufacturing setting.
Pay Range - $155,000.00 to $348,000.00 annually (Actual base pay based on factors such as relevant experience, education, market, qualifications, and skills.)
With nearly 80,000 employees globally, Kyocera is a leading manufacturer of high-tech ceramics in various industries, including aerospace, automotive, Medical applications, and semiconductor processing. Our innovative materials are found in everything from smartphones to space shuttles! Check out our profile video!
Look at these PERKS!
- Competitive pay, benefits, and hours
- 120 hours of vacation accrued per year to start (that's 3 weeks/year for regular 8-hour shifts!)
- 10 Paid Holidays per year
- 401(k) with company match
- Pension
- Medical, dental, and vision insurance
- Flexible Spending Account (FSA)
- Employee Assistance Program
- Flexible schedules
- Tuition reimbursement
We have a long-tenured staff (many with over 30 years of service!), a vital company mission, and an excellent benefits package that includes medical, dental, vision, life insurance, paid time off to volunteer, paid leave options, tuition reimbursement, an employer-paid Pension and a 401(k) with both Roth and a healthy company match. Our larger locations also feature onsite gyms, walking tracks, exercise rooms, and employee gardens!
We strive to have a diverse workforce from all backgrounds, including minorities, women, and veterans, who bring their experience to support the innovation and quality that Kyocera is known for.
Kyocera International, Inc. also has a robust corporate culture and philosophy based on the experiences and writings of our founder, Dr. Kazuo Inamori, which you can learn more about here: https://global.kyocera.com/inamori/philosophy/. Our company motto is “Do the right thing as a human being,” and we try to use that motto constantly in our decision-making.
Exempt: Yes
Leads the development of high-performance mmWave RFICs for FR2/FR3 radar and 5G applications. The role combines hands-on circuit design with technical leadership and end-to-end ownership of the Tx signal chain, including architecture, implementation, verification, characterization, and production ramp. The successful candidate will lead and mentor engineers while driving solutions that meet EVM, emissions, output power, gain, efficiency, linearity, beamforming, calibration, and reliability requirements.
RESPONSIBILITIES:
• Lead the architecture, design, layout, integration, verification, characterization, and commercialization of mmWave RFICs, with primary ownership of the Tx signal chain from baseband/IF through mixers, LO distribution, drivers, power amplifiers, gain control, beamforming, detection, and calibration.
• Develop FR2/FR3 Tx solutions for 5G, FMCW radar, and pulse radar. Translate system requirements into circuit and module specifications for EVM, emissions, gain, output power, efficiency, linearity, bandwidth, chirp/pulse fidelity, phase coherence, beam accuracy, thermal performance, and reliability.
• Define Tx budgets and allocate margin across IC, package, PCB, antenna, process, voltage, temperature, and calibration conditions; identify and close performance gaps through simulation and measurement.
• Provide hands-on technical leadership, conduct design and data reviews, resolve cross-functional issues, mentor engineers, and improve design processes, checklists, and execution quality.
• Drive RFIC-package-PCB-antenna co-design using circuit, EM, statistical, mixed-signal, reliability, and electrothermal simulation, including matching, coupling, power handling, thermal effects, beamforming accuracy, and conducted/OTA emissions.
• Own the IC design and verification flow, including biasing, power management, calibration, PDK/foundry interaction, design documentation, production variation, yield, validation, and reliability analysis.
• Partner with Test and Product Engineering to define characterization and ATE strategies, production observability, built-in test features, trims, guard bands, and high-correlation Tx measurements.
• Support silicon debug, customer issues, field failures, yield improvement, and product ramp in collaboration with Systems, Applications, Antenna, Package, PCB, Firmware, Software, Test, and Manufacturing teams.
• Manage technical risks, priorities, schedules, and deliverables; communicate architecture decisions, tradeoffs, and status clearly to program teams and senior management.
• Contribute to technology roadmaps and intellectual property that advance future products.
QUALIFICATIONS:
• M.S. or Ph.D. in Electrical Engineering or a related field, with 10-15 years of RF/analog/mixed-signal IC design experience and demonstrated leadership of complex RFIC programs.
• Deep hands-on experience with mmWave Tx architectures and circuits, including mixers/modulators, LO distribution, drivers, power amplifiers, power combining, transformers/baluns, VGA/attenuator stages, phase shifters or true-time-delay elements, couplers/detectors, matching networks, biasing, filters, op amps, calibration, protection, and power management.
• Demonstrated success delivering mmWave transmitters for 5G and/or FMCW or pulse radar from architecture and IC design through laboratory validation and production ramp.
• Strong command of Tx performance and tradeoffs, including EVM, spectral emissions, ACLR/SEM, output power, gain, efficiency, P1dB, IP3, AM-AM/AM-PM distortion, linearization, noise, bandwidth, stability, phase accuracy, beamforming, calibration, thermal limits, and reliability.
• Experience with radar waveform fidelity, including chirp linearity, pulse shaping, timing, phase coherence, leakage/isolation, and spectral control.
• Deep understanding of semiconductor device physics, CMOS and SOI technologies, high-voltage and stacked-device techniques, self-heating, safe operating area, passive/EM structures, RFIC layout, and RF reliability.
• Proficiency with Cadence, Spectre, Virtuoso, RF and EM simulation, statistical and electrothermal analysis, mixed-signal verification, and behavioral modeling. Verilog-A, Verilog, SystemVerilog, MATLAB, or Python experience is beneficial.
• Strong mmWave laboratory and characterization skills, with the ability to lead conducted and OTA debug and correlate modulation and radar measurements with simulation.
• Proven technical and people leadership, including mentorship, cross-functional design reviews, technical risk management, and timely decision-making.
• Excellent analytical, communication, teamwork, and documentation skills, with the ability to explain complex RFIC tradeoffs to technical teams, customers, and senior management.
• Working knowledge of applicable 5G and radar transmitter and emissions requirements and compliance testing.