Senior ASIC Flow & Methodology Engineer

At Euclyd, we build chips and systems that make advanced AI radically more energy-efficient and affordable. In September 2026, we closed a Series A of more than €200 million, co-led by Samsung, Somerset Capital Partners, the EQT-managed Scaleup Europe Fund and Innovation Industries. Now we’re growing fast across the full compute stack, from silicon to systems and software.

Our AI compute platforms are built on custom silicon, chiplets and advanced packaging. As Senior ASIC Flow & Methodology Engineer, you join our Silicon team and build the development infrastructure our silicon engineers rely on every day: the EDA flows, automation and methodology that let a small team develop silicon at scale. You make sure simulation, synthesis, lint, CDC, formal and power checks run reliably, repeatably and fast, from the first RTL commit to tape-out.

What you’ll do

• Build and maintain the flows: develop and maintain our simulation, synthesis, lint, CDC, formal and power flows, and make sure they run reliably across projects.
• Automate what repeats: own flow automation using Tcl, Python and CI/CD, so every change is built, checked and regressed automatically.
• Enable AI-assisted engineering: bring AI into our design, verification and implementation workflows, and turn promising experiments into tools the whole team can use.
• Run the engineering environment: manage design environments, tool releases and the regression infrastructure our engineers depend on.
• Define what “done” means: set sign-off criteria and quality metrics, and make the health of every design visible to the team.
• Support the engineers: help designers and verification engineers with methodology questions, and deploy new tools and flows without disrupting their work.
• Keep improving: drive continuous flow improvements across projects, measured in faster turnaround, fewer surprises and more time for real engineering.

AI-native, for real

We build infrastructure for agentic AI, and we use AI the same way in how we build our own products. In this role, you don’t just use AI, you make it work for the entire silicon team. Think of AI agents that triage regression failures and point to the likely root cause, turn thousands of lint and CDC violations into a short, actionable list, compare synthesis and power results across runs, or draft and review Tcl and Python flow scripts. You decide where AI adds real value, and you build it into our infrastructure so every engineer benefits.

At the same time, sign-off leaves no room for guesswork. AI-assisted results go through the same checks and quality metrics as everything else, and you treat them with the same absolute care as your own work. The goal: a small, highly leveraged team that develops silicon at a pace and quality normally reserved for much larger organisations.

Good to know

This is a hands-on engineering role in a young, fast-growing silicon team. Rather than maintaining a legacy setup, you help lay the foundation of our flows and methodology, and the choices you make will shape how every silicon engineer at Euclyd works. You work closely with our design, verification and physical implementation engineers, and with EDA vendors and external partners where our flows meet theirs. The focus is on engineering productivity and quality, not on IT administration. If you come from a large corporate, expect fewer processes, much shorter lines to decisions and plenty of room to shape how we work.

What you bring

• Methodology experience: 5+ years of experience in ASIC methodology or EDA flow development.
• Scripting skills: strong Tcl and Python skills; you write automation that others can rely on and maintain.
• Tool experience: hands-on experience with Synopsys, Cadence and/or Siemens EDA tools.
• Flow knowledge: familiarity with simulation, synthesis, lint, CDC and formal verification flows, and how they fit together on the way to sign-off.
• Linux: experience with Linux-based development environments.
• Tape-out experience: you supported at least one production tape-out.
• Automation track record: a proven track record of automation that measurably improved engineering productivity.
• Education: a BSc or MSc in a relevant technical field, or equivalent experience.
• AI-native mindset: you already use AI in your engineering work and you’re eager to build it into the flows, with a healthy dose of scepticism wherever sign-off is on the line.
• Languages: fluent English, spoken and written.
• Who you are: a first-principles thinker who operates independently in a fast-moving silicon development environment. You take ownership, believe in radical efficiency and maintain your flows with absolute care, because a whole team depends on them.

What we offer

The chance to help tackle the energy problem of AI, by building a disruptive AI compute platform from the logic gate up. You’ll shape the flows and methodology that every silicon engineer at Euclyd works with, in a small, agile and mission-driven team at the High Tech Campus Eindhoven, in the heart of Europe’s semiconductor ecosystem. We offer an all-in salary between €80,000 and €100,000 gross per year depending on your experience, standard secondary benefits and the flexibility of hybrid working.

Interested?

Send a short introduction and your CV or LinkedIn profile to careers@euclyd.ai. Tell us why this role appeals to you, and about a flow or piece of automation you built that made a real difference for your team.