RFIC Engineer

Title: ASICS Engineering

Date Range: Oct 4, 2026 – Apr 2, 2027

Standard Hours Per Week: 37.50

Location: Ireland - Remote - Cork

TECHNICAL SKILLS

Must Have

• 5+ year of RFIC work experience
• ADE/XL
• AMS
• Cadence
• CMOS IC Design
• Maestro
• Spectre
• SpectreRF
• VerilogA

Nice To Have

• 22um CMOS experience
• IF Filter
• LO
• Low-Noise Amplifier (LNA)
• RF Mixer

4-8 years of experience required

The senior engineer will take on the debug and verification of designs by performing full Rx/Tx chain verification simulations between RF and IF ports, reporting compliance to spec and validating device register controls for test. The tasks will include:

· Review of block specifications.

· Schematic design, simulation and reporting compliance to specifications.

· Overseeing a layout engineer to complete the layout.

· Post-layout parasitic simulation and necessary adjustments.

· Liaising with the relevant technical lead to integrate the designs.

· Presentation of design for block-level reviews.

· Completing top level verification simulations

o Reporting compliance to spec

o Validating device register control settings for test

Key Responsibilities:

• Acts as a key contributor in a complex environment.
• Responsible for the delivering the fully verified blocks.
• Solves complex problems in a tightly constrained environment.
• Fully competent in Analogue design for complex sub-cells and small subsystems.
• Keeps abreast of new developments and is technical expert in the design of analogue sub-cells.
• Ensures quality of the solution; works with macro lead to ensure timely delivery of subsystems.